2020/04/07 by Fabian Schuiki, Schuiki, Fabian, Andreas Kurth +5 · 2 voices
Engineering · Computer Science · #Semiconductor materials and devices #VLSI and Analog Circuit Testing #Electrostatic Discharge in Electronics
paper · pdf · doi:10.48550/arxiv.2004.03494
Modern Hardware Description Languages (HDLs) such as SystemVerilog or VHDL\nare, due to their sheer complexity, insufficient to transport designs through\nmodern circuit design flows. Instead, each design automation tool lowers HDLs\nto its own Intermediate Representation (IR). These tools are monolithic and\nmostly proprietary, disagree in their implementation of HDLs, and while many\nredundant IRs exists, no IR today can be used through the entire circuit design\nflow. To solve this problem, we propose the LLHD multi-level IR. LLHD is\ndesigned as simple, unambiguous reference description of a digital circuit, yet\nfully captures existing HDLs. We show this with our reference compiler on\ndesigns as complex as full CPU cores. LLHD comes with lowering passes to a\nhardware-near structural IR, which readily integrates with existing tools. LLHD\nestablishes the basis for innovation in HDLs and tools without redundant\ncompilers or disjoint IRs. For instance, we implement an LLHD simulator that\nruns up to 2.4x faster than commercial simulators but produces equivalent,\ncycle-accurate results. An initial vertically-integrated research prototype is\ncapable of representing all levels of the IR, implements lowering from the\nbehavioural to the structural IR, and covers a sufficient subset of\nSystemVerilog to support a full CPU design.\n