2015/06/12 by Guy E. Blelloch, Jeremy T. Fineman, Phillip B. Gibbons +2
Computer Science · Mathematics · #Advanced Data Storage Technologies #Algorithm #Algorithms and Data Compression #CPU cache #Cache #Cache algorithms #Cache-oblivious algorithm #Computer science #Logarithm #Mathematics #Matrix multiplication #Merge sort #Parallel Computing and Optimization Techniques #Parallel computing #Shared memory #Sorting #Sorting algorithm #Sorting network #cs.DS
paper · pdf · doi:10.1145/2755573.2755604
openalex publication_date 2015/06/12 · arxiv created 2016/03/11 · arxiv updated 2016/03/15 · openalex created_date 2025/10/10 · openalex updated_date 2026/08/06
Emerging memory technologies have a significant gap between the cost, both in time and in energy, of writing to memory versus reading from memory. In this paper we present models and algorithms that account for this difference, with a focus on write-efficient sorting algorithms. First, we consider the PRAM model with asymmetric write cost, and show that sorting can be performed in O(n) writes, O(n log n) reads, and logarithmic depth (parallel time). Next, we consider a variant of the External Memory (EM) model that charges k > 1 for writing a block of size B to the secondary memory, and present variants of three EM sorting algorithms (multi-way merge sort, sample sort, and heap sort using buffer trees) that asymptotically reduce the number of writes over the original algorithms, and perform roughly k block reads for every block write. Finally, we define a variant of the Ideal-Cache model with asymmetric write costs, and present write-efficient,cache-oblivious parallel algorithms for sorting, FFTs, and matrix multiplication. Adapting prior bounds for work-stealing and parallel-depth-first schedulers to the asymmetric setting, these yield provably good bounds for parallel machines with private caches or with a shared cache, respectively.