2017/04/01 by Donald Y.C. Lie, Jill Mayeda, J. López · 1 citation
Engineering · #Advanced Power Amplifier Design #Advanced Wireless Communication Technologies #Amplifier #Application-specific integrated circuit #Bandwidth (computing) #Broadband #Broadband networks #Chip #Chipset #Computer science #Electrical engineering #Electronic engineering #Engineering #Extremely high frequency #Integrated circuit design #Linearity #Modulation (music) #PAPR reduction in OFDM #Physics #Power (physics) #RFIC #Radio frequency #Telecommunications
paper · doi:10.1109/vlsi-dat.2017.7939653
openalex publication_date 2017/04/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/29
The incoming 5G revolution will dramatically increase the design complexity for handsets and communication infrastructures, demanding the RFIC and ASIC chipsets designers, network and system components vendors and telecom operators to provide viable 5G E2E (End-to-End) products and solutions before A.D. 2020. The broadband modulation bandwidth for RF transmitters (i.e., 250 MHz to above 1 GHz), stringent linearity, and power efficiency requirements at the cm-Wave/mm-Wave 5G frequencies will make it particularly challenging for highly efficient linear 5G power amplifier (PA) design. We will briefly address two major design challenges and solutions for 5G PA design here, namely the device technology choices and efficiency enhancement techniques.