2014/06/09 by Jean-Francois Kempf, Olivier Lebeltel, Oded Maler
Computer Science · #cs.SE #cs.PF
paper · pdf · doi:10.4204/eptcs.154.6
published as EPTCS 154, 2014, pp. 78-92 · In Proceedings QAPL 2014, arXiv:1406.1567
arxiv created 2014/06/09 · arxiv updated 2014/06/10
We propose a tool-supported methodology for design-space exploration for embedded systems. It provides means to define high-level models of applications and multi-processor architectures and evaluate the performance of different deployment (mapping, scheduling) strategies while taking uncertainty into account. We argue that this extension of the scope of formal verification is important for the viability of the domain.