2003/01/01 by Bo Yao, Hongyu Chen, Chung‐Kuan Cheng +1 · 1 citation
Engineering · Computer Science · #VLSI and FPGA Design Techniques #Embedded Systems Design Techniques #VLSI and Analog Circuit Testing
paper · doi:10.1145/606603.606607
openalex publication_date 2003/01/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/06/26
Floorplan representation is a fundamental issue in designing a floorplanning algorithm. In this paper, we first present a twin binary trees structure for mosaic floorplans. It is a nonredundant representation. We then derive the exact number of configurations for mosaic floorplans and slicing floorplans. Finally, the relationships between various state-of-the-art floorplan representations are discussed and explored.