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An SST-Based Emergency Power Sharing Architecture Using a Common LVDC Feeder for Hybrid AC/DC Microgrid Clusters and Segmented MV Distribution Grids

2026/01/23 by Sérgio Coelho, João L. Afonso, Vitor Monteiro · 1 voice
Engineering · #Microgrid Control and Optimization #Optimal Power Flow Distribution #Islanding Detection in Power Systems

paper · doi:10.3390/electronics15030496

openalex publication_date 2026/01/23 · openalex created_date 2026/01/24 · openalex updated_date 2026/07/22

Abstract

The growing incorporation of distributed energy resources (DER) in power distribution grids, although pivotal to the energy transition, increases operational variability and amplifies the exposure to disturbances that can compromise resilience and the continuity of service during contingencies. Addressing these challenges requires both a shift toward flexible distribution architectures and the adoption of advanced power electronics interfacing systems. In this setting, this paper proposes a resilience-oriented strategy for medium-voltage (MV) distribution systems and clustered hybrid AC/DC microgrids interfaced through solid-state transformers (SSTs). When a fault occurs along an MV feeder segment, the affected microgrids naturally transition to islanded operation. However, once their local generation and storage become insufficient to sustain autonomous operation, the proposed framework reconfigures the power routing within the cluster by activating an emergency low-voltage DC (LVDC) power path that bypasses the faulted MV section. This mechanism enables controlled power sharing between microgrids during prolonged MV outages, ensuring the supply of priority loads without oversizing SSTs or reinforcing existing infrastructure. Experimental validation on a reduced-scale SST prototype demonstrates stable grid-forming and grid-following operation. The reliability of the proposed scheme is supported by both steady-state and transient experimental results, confirming accurate voltage regulation, balanced sinusoidal waveforms, and low current tracking errors. All tests were conducted at a switching frequency of 50 kHz, highlighting the robustness of the proposed architecture under dynamic operation.

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