FPGA implementation of short critical path CORDIC-based approximation of the eight-point DCT

2011/10/31 by Maxim Vashkevich, Vashkevich, Maxim, Marek Parfieniuk +4
Computer Science · Engineering · #Advanced Adaptive Filtering Techniques #Advancements in PLL and VCO Technologies #Analog and Mixed-Signal Circuit Design #Digital Filter Design and Implementation #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Numerical Methods and Algorithms #cs.AR

paper · pdf · doi:10.48550/arxiv.1110.6865

4 pages, 5 figures

arxiv created 2011/10/31 · openalex publication_date 2011/10/31 · arxiv updated 2011/11/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

This paper presents an efficient approach for multiplierless implementation for eight-point DCT approximation, which based on coordinate rotation digital computer (CORDIC) algorithm. The main design objective is to make critical path of corresponding circuits shorter and reduce the combinational delay of proposed scheme.

Related

• Generic-Precision algorithm for DCT-Cordic architectures
• Error Analysis of CORDIC Processor with FPGA Implementation
• A study and comparison of COordinate Rotation DIgital Computer (CORDIC) architectures
• CORDIC-based Architecture for Powering Computation in Fixed-Point\n Arithmetic
• Modified virtually scaling-free adaptive CORDIC rotator algorithm and architecture