2012/07/30 by Alglave, Jade, Kroening, Daniel, Nimal, Vincent +1 · 1 citation
#FOS: Computer and information sciences #Logic in Computer Science (cs.LO) #Software Engineering (cs.SE)
paper · doi:10.48550/arxiv.1207.7264
Despite multiprocessors implementing weak memory models, verification methods often assume Sequential Consistency (SC), thus may miss bugs due to weak memory. We propose a sound transformation of the program to verify, enabling SC tools to perform verification w.r.t. weak memory. We present experiments for a broad variety of models (from x86/TSO to Power/ARM) and a vast range of verification tools, quantify the additional cost of the transformation and highlight the cases when we can drastically reduce it. Our benchmarks include work-queue management code from PostgreSQL.