2003/06/14 by D. Acosta, Acosta, D., V. Golovtsov +13
Physics and Astronomy · #FOS: Physical sciences #Instrumentation and Detectors (physics.ins-det) #physics.ins-det
paper · pdf · doi:10.48550/arxiv.physics/0306117
7 pages, 5 figures, proceedings for the conference on Computing in High Energy and Nuclear Physics, March 24-28 2003, La Jolla, California
arxiv created 2003/06/14 · arxiv updated 2009/12/01
We report on the design and test results of a prototype processor for the CMS Level-1 trigger that performs 3-D track reconstruction and measurement from data recorded by the cathode strip chambers of the endcap muon system. The tracking algorithms are written in C++ using a class library we developed that facilitates automatic conversion to Verilog. The code is synthesized into firmware for field-programmable gate-arrays from the Xilinx Virtex-II series. A second-generation prototype has been developed and is currently under test. It performs regional track-finding in a 60 degree azimuthal sector and accepts 3 GB/s of input data synchronously with the 40 MHz beam crossing frequency. The latency of the track-finding algorithms is expected to be 250 ns, including geometrical alignment correction of incoming track segments and a final momentum assignment based on the muon trajectory in the non-uniform magnetic field in the CMS endcaps.