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Circuit Model Reduction with Scaled Relative Graphs

2022/04/04 by Thomas Chaffey, Alberto Padoan, Chaffey, Thomas +1 · 1 citation
Computer Science · Physics and Astronomy · #47H05 #47N70 #93C10 #FOS: Electrical engineering #FOS: Mathematics #Model Reduction and Neural Networks #Model-Driven Software Engineering Techniques #Natural Language Processing Techniques #Optimization and Control (math.OC) #Systems and Control (eess.SY) #electronic engineering #information engineering

paper · pdf · doi:10.48550/arxiv.2204.01434

openalex publication_date 2022/04/04 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

Continued fractions are classical representations of complex objects (for example, real numbers) as sums and inverses of simpler objects (for example, integers). The analogy in linear circuit theory is a chain of series/parallel one-ports: the port behavior is a continued fraction containing the port behaviors of its elements. Truncating a continued fraction is a classical method of approximation, which corresponds to deleting the circuit elements furthest from the port. We apply this idea to chains of series/parallel one-ports composed of arbitrary nonlinear relations. This gives a model reduction method which automatically preserves properties such as incremental positivity. The Scaled Relative Graph (SRG) gives a graphical representation of the original and truncated port behaviors. The difference of these SRGs gives a bound on the approximation error, which is shown to be competitive with existing methods.

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