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Accelerating BLAS and LAPACK via Efficient Floating Point Architecture\n Design

2016/10/27 by Farhad Merchant, Merchant, Farhad, Anupam Chattopadhyay +8
Computer Science · #Advanced Data Storage Technologies #Distributed and Parallel Computing Systems #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Numerical Methods and Algorithms #Parallel Computing and Optimization Techniques

paper · pdf · doi:10.48550/arxiv.1610.08705

openalex publication_date 2016/10/27 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

Basic Linear Algebra Subprograms (BLAS) and Linear Algebra Package (LAPACK)\nform basic building blocks for several High Performance Computing (HPC)\napplications and hence dictate performance of the HPC applications. Performance\nin such tuned packages is attained through tuning of several algorithmic and\narchitectural parameters such as number of parallel operations in the Directed\nAcyclic Graph of the BLAS/LAPACK routines, sizes of the memories in the memory\nhierarchy of the underlying platform, bandwidth of the memory, and structure of\nthe compute resources in the underlying platform. In this paper, we closely\ninvestigate the impact of the Floating Point Unit (FPU) micro-architecture for\nperformance tuning of BLAS and LAPACK. We present theoretical analysis for\npipeline depth of different floating point operations like multiplier, adder,\nsquare root, and divider followed by characterization of BLAS and LAPACK to\ndetermine several parameters required in the theoretical framework for deciding\noptimum pipeline depth of the floating operations. A simple design of a\nProcessing Element (PE) is presented and shown that the PE outperforms the most\nrecent custom realizations of BLAS and LAPACK by 1.1X to 1.5X in Gflops/W, and\n1.9X to 2.1X in Gflops/mm2.\n

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