2019/03/22 by Martin Geier, Geier, Martin, Dominik Faller +5
Computer Science · #Distributed #Embedded Systems Design Techniques #FOS: Computer and information sciences #FOS: Electrical engineering #Parallel #Parallel Computing and Optimization Techniques #Performance (cs.PF) #Real-Time Systems Scheduling #Signal Processing (eess.SP) #and Cluster Computing (cs.DC) #electronic engineering #information engineering
paper · pdf · doi:10.48550/arxiv.1903.09548
openalex publication_date 2019/03/22 · openalex created_date 2022/07/29 · openalex updated_date 2026/07/28
The ongoing integration of fine-grained power management features already\nestablished in CPU-driven Systems-on-Chip (SoCs) enables both traditional Field\nProgrammable Gate Arrays (FPGAs) and, more recently, hybrid Programmable SoCs\n(pSoCs) to reach more energy-sensitive application domains (such as, e.g.,\nautomotive and robotics). By combining a fixed-function multi-core SoC with\nflexible, configurable FPGA fabric, the latter can be used to realize\nheterogeneous Real-time Systems (RTSs) commonly implementing complex\napplication-specific architectures with high computation and communication\n(I/O) densities. Their dynamic changes in workload, currently active power\nsaving features and thus power consumption require precise voltage and current\nsensing on all relevant supply rails to enable dependable evaluation of the\nvarious power management techniques. In this paper, we propose a low-cost\n18-channel 16-bit-resolution measurement (sub-)system capable of 200 kSPS\n(kilo-samples per second) for instrumentation of current pSoC development\nboards. To this end, we join simultaneously sampling analog-to-digital\nconverters (ADCs) and analog voltage/current sensing circuitry with a Cortex M7\nmicrocontroller using an SD card for storage. In addition, we propose to\ninclude crucial I/O components such as Ethernet PHYs into the power monitoring\nto gain a holistic view on the RTS's temporal behavior covering not only\ncomputation on FPGA and CPUs, but also communication in terms of, e.g.,\nreception of sensor values and transmission of actuation signals. We present an\nFMC-sized implementation of our measurement system combined with two Gigabit\nEthernet PHYs and one HDMI input. Paired with Xilinx' ZC702 development board,\nwe are able to synchronously acquire power traces of a Zynq pSoC and the two\nPHYs precise enough to identify individual Ethernet frames.\n