2015/08/28 by Franz Richter-Gottfried, Richter-Gottfried, Franz, Alexander Ditter +3
Computer Science · #Embedded Systems Design Techniques #FOS: Computer and information sciences #Logic, programming, and type systems #Parallel Computing and Optimization Techniques #Software Engineering (cs.SE)
paper · pdf · doi:10.48550/arxiv.1508.07977
openalex publication_date 2015/08/28 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Designing hardware is a time-consuming and complex process. Realization of both, embedded and high-performance applications can benefit from a design process on a higher level of abstraction. This helps to reduce development time and allows to iteratively test and optimize the hardware design during development, as common in software development. We present our tool, OCLAcc, which allows the generation of entire FPGA-based hardware accelerators from OpenCL and discuss the major novelties of OpenCL 2.0 and how they can be realized in hardware using OCLAcc.