DIVAS: An LLM-based End-to-End Framework for SoC Security Analysis and Policy-based Protection

2023/08/14 by Sudipta Paria, Paria, Sudipta, Aritra Dasgupta +3 · 8 citations
Computer Science · #Advanced Malware Detection Techniques #Cryptography and Security (cs.CR) #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Physical Unclonable Functions (PUFs) and Hardware Security #Security and Verification in Computing

paper · pdf · doi:10.48550/arxiv.2308.06932

openalex publication_date 2023/08/14 · openalex created_date 2023/08/16 · openalex updated_date 2026/07/28

Abstract

Securing critical assets in a bus-based System-On-Chip (SoC) is imperative to mitigate potential vulnerabilities and prevent unauthorized access, ensuring the integrity, availability, and confidentiality of the system. Ensuring security throughout the SoC design process is a formidable task owing to the inherent intricacies in SoC designs and the dispersion of assets across diverse IPs. Large Language Models (LLMs), exemplified by ChatGPT (OpenAI) and BARD (Google), have showcased remarkable proficiency across various domains, including security vulnerability detection and prevention in SoC designs. In this work, we propose DIVAS, a novel framework that leverages the knowledge base of LLMs to identify security vulnerabilities from user-defined SoC specifications, map them to the relevant Common Weakness Enumerations (CWEs), followed by the generation of equivalent assertions, and employ security measures through enforcement of security policies. The proposed framework is implemented using multiple ChatGPT and BARD models, and their performance was analyzed while generating relevant CWEs from the SoC specifications provided. The experimental results obtained from open-source SoC benchmarks demonstrate the efficacy of our proposed framework.

Cited by

• Intelligent Graybox Fuzzing via ATPG-Guided Seed Generation and Submodule Analysis
• CHARGE: Leveraging CWE Hierarchies for Hardware Security SystemVerilog Assertion Generation
• Scheduzz: Constraint-based Fuzz Driver Generation with Dual Scheduling
• Large Language Models in Cybersecurity: Applications, Vulnerabilities, and Defense Techniques
• SVAgent: AI Agent for Hardware Security Verification Assertion
• MGC: A Compiler Framework Exploiting Compositional Blindness in Aligned LLMs for Malware Generation
• SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models
• LASA: Enhancing SoC Security Verification with LLM-Aided Property Generation

Related

• LLM for SoC Security: A Paradigm Shift
• BugWhisperer: Fine-Tuning LLMs for SoC Hardware Vulnerability Detection
• Unlocking Hardware Security Assurance: The Potential of LLMs
• LASA: Enhancing SoC Security Verification with LLM-Aided Property Generation
• DiSPEL: Distributed Security Policy Enforcement for Bus-based SoC