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Leaky Buddies: Cross-Component Covert Channels on Integrated CPU-GPU\n Systems

2020/11/18 by Sankha Baran Dutta, Hoda Naghibijouybari, Dutta, Sankha Baran +7
Computer Science · #Adversarial Robustness in Machine Learning #Cryptography and Security (cs.CR) #FOS: Computer and information sciences #Internet Traffic Analysis and Secure E-voting #Security and Verification in Computing

paper · pdf · doi:10.48550/arxiv.2011.09642

openalex publication_date 2020/11/18 · openalex created_date 2022/07/25 · openalex updated_date 2026/07/28

Abstract

Graphics Processing Units (GPUs) are a ubiquitous component across the range\nof today's computing platforms, from phones and tablets, through personal\ncomputers, to high-end server class platforms. With the increasing importance\nof graphics and video workloads, recent processors are shipped with GPU devices\nthat are integrated on the same chip. Integrated GPUs share some resources with\nthe CPU and as a result, there is a potential for microarchitectural attacks\nfrom the GPU to the CPU or vice versa. We believe this type of attack, crossing\nthe component boundary (GPU to CPU or vice versa) is novel, introducing unique\nchallenges, but also providing the attacker with new capabilities that must be\nconsidered when we design defenses against microarchitectrual attacks in these\nenvironments. Specifically, we consider the potential for covert channel\nattacks that arise either from shared microarchitectural components (such as\ncaches) or through shared contention domains (e.g., shared buses). We\nillustrate these two types of channels by developing two reliable covert\nchannel attacks. The first covert channel uses the shared LLC cache in Intel's\nintegrated GPU architectures. The second is a contention based channel\ntargeting the ring bus connecting the CPU and GPU to the LLC. Cross component\nchannels introduce a number of new challenges that we had to overcome since\nthey occur across heterogeneous components that use different computation\nmodels and are interconnected using asymmetric memory hierarchies. We also\nexploit GPU parallelism to increase the bandwidth of the communication, even\nwithout relying on a common clock. The LLC based channel achieves a bandwidth\nof 120 kbps with a low error rate of 2%, while the contention based channel\ndelivers up to 400 kbps with a 0.8% error rate.\n

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