Hardware-Efficient Quantum Random Access Memory Design with a Native Gate Set on Superconducting Platforms

2023/06/17 by Yun-Jie Wang, Wang, Yun-Jie, Zhang, Sheng +10 · 3 citations
Computer Science · Physics and Astronomy · #FOS: Physical sciences #Quantum Computing Algorithms and Architecture #Quantum Physics (quant-ph) #Quantum and electron transport phenomena #Quantum-Dot Cellular Automata

paper · pdf · doi:10.48550/arxiv.2306.10250

openalex publication_date 2023/06/17 · openalex created_date 2023/06/22 · openalex updated_date 2026/07/28

Abstract

Quantum Random Access Memory (QRAM) is a critical component for enabling data queries in superposition, which is the cornerstone of quantum algorithms. Among various QRAM architectures, the bucket-brigade model stands out due to its noise resilience. This paper presents a hardware-efficient native gate set iSCZ, C-iSCZ for implementing bucket-brigade QRAM on superconducting platforms. The experimental feasibility of the proposed gate set is demonstrated, showing high fidelity and reduced complexity. By leveraging the complementary control property in QRAM, our approach directly substitutes the conventional SWAP, CSWAP gates with the new gate set, eliminating decomposition overhead and significantly reducing circuit depth and gate count.

Cited by

• Automated Discovery of Non-local Photonic Gates
• Practical Fidelity Limits of Toffoli Gates in Superconducting Quantum Processors
• A resource-efficient quantum-walker Quantum RAM

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• Experimental realization of the bucket-brigade quantum random access memory
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• Fast and Error-Correctable Quantum RAM