2010/05/11 by Kamran Eshraghian, Kyoung Rok Cho, Eshraghian, Kamran +10
Engineering · Materials Science · Physics and Astronomy · #Advanced Memory and Neural Computing #Conducting polymers and applications #FOS: Physical sciences #Ferroelectric and Negative Capacitance Devices #Mesoscale and Nanoscale Physics (cond-mat.mes-hall) #cond-mat.mes-hall
paper · pdf · doi:10.48550/arxiv.1005.3687
10 pages, 11 figures
arxiv created 2010/05/11 · openalex publication_date 2010/05/11 · arxiv updated 2015/03/16 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Large-capacity Content Addressable Memory (CAM) is a key element in a wide variety of applications. The inevitable complexities of scaling MOS transistors introduce a major challenge in the realization of such systems. Convergence of disparate technologies, which are compatible with CMOS processing, may allow extension of Moore's Law for a few more years. This paper provides a new approach towards the design and modeling of Memristor (Memory resistor) based Content Addressable Memory (MCAM) using a combination of memristor MOS devices to form the core of a memory/compare logic cell that forms the building block of the CAM architecture. The non-volatile characteristic and the nanoscale geometry together with compatibility of the memristor with CMOS processing technology increases the packing density, provides for new approaches towards power management through disabling CAM blocks without loss of stored data, reduces power dissipation, and has scope for speed improvement as the technology matures.