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Apparate: Evading Memory Hierarchy with GodSpeed Wireless-on-Chip

2024/04/23 by GS, Nitesh Narayana, Das, Abhijit
#Emerging Technologies (cs.ET) #FOS: Computer and information sciences #Hardware Architecture (cs.AR)

paper · doi:10.48550/arxiv.2406.06536

Abstract

The rapid advancements in memory systems, CPU technology, and emerging technologies herald a transformative potential in computing, promising to revolutionize memory hierarchies. Innovations in DDR memory are delivering unprecedented bandwidth, while advancements in on-chip wireless technology are reducing size and increasing speed. The introduction of godspeed wireless transceivers on chip, alongside near high-speed DRAM, is poised to directly facilitate memory requests. This integration suggests the potential for eliminating traditional memory hierarchies, offering a new paradigm in computing efficiency and speed. These developments indicate a near-future where computing systems are significantly more responsive and powerful, leveraging direct, high-speed memory access mechanisms.

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