Analysis of hardware implementation of packet classification algorithms

2025/01/07 by Tashev, Komil

paper · doi:10.34920/icdgpdt.31

Abstract

This paper describes network packet classification algorithms for attack detection and prevention systems. Approaches to hardware implementation of network packet classification algorithms using decision trees, field splitting, and parallel processing are presented. The field splitting algorithm in the network context was initially studied in the Field- Split algorithm Bit Vector, the main purpose is to reduce memory consumption. To balance the bandwidth, and delay, which allows to improve the efficiency of power consumption and memory access, DPRAM is proposed for the FSBV algorithm, which will enable data to be read repeatedly. In the packet classification process, the source address, destination address, source port, and destination port are calculated by applying various operations for matching. To operate, to match the fields based on the FSBV algorithm, triggers, LUTs, and various logic elements will be applied.

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