2022/02/15 by Lianfeng Yu, Yu, Lianfeng, Zhaokun Jing +5
Engineering · Neuroscience · #Advanced Memory and Neural Computing #CCD and CMOS Imaging Sensors #FOS: Computer and information sciences #FOS: Electrical engineering #Hardware Architecture (cs.AR) #Photoreceptor and optogenetics research #Signal Processing (eess.SP) #electronic engineering #information engineering
paper · pdf · doi:10.48550/arxiv.2202.10424
openalex publication_date 2022/02/15 · openalex created_date 2022/04/03 · openalex updated_date 2026/07/28
Memristive in-memory sorting has been proposed recently to improve hardware sorting efficiency. Using iterative in-memory min computations, data movements between memory and external processing units can be eliminated for improved latency and energy efficiency. However, the bit-traversal algorithm to search the min requires a large number of column reads on memristive memory. In this work, we propose a column-skipping algorithm with help of a near-memory circuit. Redundant column reads can be skipped based on recorded states for improved latency and hardware efficiency. To enhance the scalability, we develop a multi-bank management that enables column-skipping for dataset stored in different memristive memory banks. Prototype column-skipping sorters are implemented with a 1T1R memristive memory in 40nm CMOS technology. Experimented on a variety of sorting datasets, the length-1024 32-bit column-skipping sorter with state recording of 2 demonstrates up to 4.08x speedup, 3.14x area efficiency and 3.39x energy efficiency, respectively, over the latest memristive in-memory sorting.