2021/11/11 by Jinshui Miao, Miao, Jinshui, Chloe Leblanc +20
Engineering · Materials Science · Physics and Astronomy · #2D Materials and Applications #Advancements in Semiconductor Devices and Circuit Design #Nanowire Synthesis and Applications #cond-mat.mes-hall #cond-mat.mtrl-sci #cond-mat.other #physics.app-ph
paper · pdf · doi:10.48550/arxiv.2111.06396
5 figures and supporting information
arxiv created 2021/11/11 · arxiv updated 2021/11/12
Low power consumption in both static and dynamic modes of operation is a key requirement in modern, highly scaled nanoelectronics. Tunneling field-effect transistors (TFETs) that exploit direct band-to-band tunneling of charges and exhibit steep sub-threshold slope (SS) transfer characteristics are an attractive option in this regard. However, current generation of Si and III-V heterojunction based TFETs while suffer from low ON current density and ON/OFF current ratios for < 60 mV/dec operation. Semiconducting two-dimensional (2D) layers have recently renewed enthusiasm in novel device design for TFETs not only because of their atomically-thin bodies that favor superior electrostatic control but the same feature also favors higher ON current density and consequently high ON/OFF ratio. Here, we demonstrate gate-tunable heterojunction diodes (triodes) fabricated from InSe/Si 2D/3D van der Waals heterostructures, with a minimum subthreshold swing (SS) as low as 6.4 mV/dec and an SS average of 30 mV/dec over 4 decades of current. Further, the devices show a large current on/off ratio of approximately 106 and on-state current density of 0.3 uA/um at a drain bias of -1V. Our work opens new avenues for 2D semiconductors for 3D hetero-integration with Si to achieve ultra-low power logic devices.