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On Frequency Optimisation for Power Saving in WSNs: Finding Optimum Hardware Timers Frequencies

2007/09/17 by Andreea Picu, Picu, Andreea, Antoine Fraboulet +4
Computer Science · Engineering · #Advanced Battery Technologies Research #Energy Harvesting in Wireless Networks #FOS: Computer and information sciences #Networking and Internet Architecture (cs.NI) #Wireless Power Transfer Systems #cs.NI

paper · pdf · doi:10.48550/arxiv.0709.2618

openalex publication_date 2007/09/17 · arxiv created 2012/02/27 · arxiv updated 2012/02/28 · openalex created_date 2016/06/24 · openalex updated_date 2026/07/28

Abstract

Wireless Sensor Networks research and demand are now in full expansion, since people came to understand these are the key to a large number of issues in industry, commerce, home automation, healthcare, agriculture and environment, monitoring, public safety etc. One of the most challenging research problems in sensor networks research is power awareness and power-saving techniques. In this master's thesis, we have studied one particular power-saving technique, i.e. frequency scaling. In particular, we analysed the close relationship between clock frequencies in a microcontroller and several types of constraints imposed on these frequencies, e.g. by other components of the microcontroller, by protocol specifications, by external factors etc. Among these constraints, we were especially interested in the ones imposed by the timer service and by the serial ports' transmission rates. Our efforts resulted in a microcontroller configuration management tool which aims at assisting application programmers in choosing microcontroller configurations, in function of the particular needs and constraints of their application.

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