2018/07/14 by Tobias Strauch, Strauch, Tobias
Computer Science · Engineering · #Embedded Systems Design Techniques #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Radiation Effects in Electronics #Real-time simulation and control systems
paper · pdf · doi:10.48550/arxiv.1807.05442
openalex publication_date 2018/07/14 · openalex created_date 2022/08/04 · openalex updated_date 2026/07/28
The C language is getting more and more popular as a design and verification language (DVL). SystemC, ParC [1] and Cx [2] are based on C. C-models of the design and verification environment can also be generated from new DVLs (e.g. Chisel [3]) or classical DVLs such as VHDL or Verilog. The execution of these models is usually license free and presumably faster than their alternative counterparts (simulators). This paper proposes activity-dependent, ordered, cycle-accurate (AOC) C-models to speed up simulation time. It compares the results with alternative concepts. The paper also examines the execution of the AOC C-model on a multithreaded processor environment.