2023/11/06 by James T. Meech, Meech, James T. · 1 citation
Computer Science · #Algorithm #Cellular Automata and Applications #Computer architecture #Computer engineering #Computer hardware #Computer science #Embedded Systems Design Techniques #FOS: Computer and information sciences #Generator (circuit theory) #Hardware Architecture (cs.AR) #Hardware description language #Machine Learning (cs.LG) #Netlist #Parallel Computing and Optimization Techniques #Programming Languages (cs.PL) #Programming language #Python (programming language) #Random number generation #Randomness #Scripting language #Test case #Test suite #Verilog
paper · pdf · doi:10.48550/arxiv.2311.03489
published in arXiv (Cornell University) (Cornell University)
openalex publication_date 2023/11/06 · openalex created_date 2025/10/10 · openalex updated_date 2026/08/05
We present a new high-level synthesis methodology for using large language model tools to generate hardware designs. The methodology uses exclusively open-source tools excluding the large language model. As a case study, we use our methodology to generate a permuted congruential random number generator design with a wishbone interface. We verify the functionality and quality of the random number generator design using large language model-generated simulations and the Dieharder randomness test suite. We document all the large language model chat logs, Python scripts, Verilog scripts, and simulation results used in the case study. We believe that our method of hardware design generation coupled with the open source silicon 130 nm design tools will revolutionize application-specific integrated circuit design. Our methodology significantly lowers the bar to entry when building domain-specific computing accelerators for the Internet of Things and proof of concept prototypes for later fabrication in more modern process nodes.