2022/06/17 by Fernando Fernandes dos Santos, Santos, Fernando Fernandes dos, Angeliki Kritikakou +3
Computer Science · Engineering · #Adversarial Robustness in Machine Learning #Distributed systems and fault tolerance #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Parallel Computing and Optimization Techniques #Radiation Effects in Electronics
paper · pdf · doi:10.48550/arxiv.2206.08639
openalex publication_date 2022/06/17 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
RISC-V architectures have gained importance in the last years due to their flexibility and open-source Instruction Set Architecture (ISA), allowing developers to efficiently adopt RISC-V processors in several domains with a reduced cost. For application domains, such as safety-critical and mission-critical, the execution must be reliable as a fault can compromise the system's ability to operate correctly. However, the application's error rate on RISC-V processors is not significantly evaluated, as it has been done for standard x86 processors. In this work, we investigate the error rate of a commercial RISC-V ASIC platform, the GAP8, exposed to a neutron beam. We show that for computing-intensive applications, such as classification Convolutional Neural Networks (CNN), the error rate can be 3.2x higher than the average error rate. Additionally, we find that the majority (96.12%) of the errors on the CNN do not generate misclassifications. Finally, we also evaluate the events that cause application interruption on GAP8 and show that the major source of incorrect interruptions is application hangs (i.g., due to an infinite loop or a racing condition).