2023/11/06 by M.E. García Redondo, T. Muscheid, Redondo, M. E. García +31 · 2 citations
Engineering · Physics and Astronomy · #FOS: Physical sciences #Instrumentation and Detectors (physics.ins-det) #Instrumentation and Methods for Astrophysics (astro-ph.IM) #Physics of Superconductivity and Magnetism #Radio Frequency Integrated Circuit Design #Superconducting and THz Device Technology
paper · pdf · doi:10.48550/arxiv.2311.03480
openalex publication_date 2023/11/06 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
This work reports the performance evaluation of an SDR readout system based on the latest generation (Gen3) of the AMD's Radio Frequency System-on-Chip (RFSoC) processing platform, which integrates a full-stack processing system and a powerful FPGA with up to 32 high-speed and high-resolution 14-bit Digital-to-Analog Converters (DACs) and Analog-to-Digital Converters (ADCs). The proposed readout system uses a previously developed multi-band, double-conversion IQ RF-mixing board targeting a multiplexing factor of approximately 1,000 bolometers in a bandwidth between 4 and 8 GHz, in line with state-of-the-art microwave SQUID multiplexers (μMUX). The characterization of the system was performed in two stages, under the conditions typically imposed by the multiplexer and the cold readout circuit. First, in transmission, showing that noise and spurious levels of the generated tones are close to the values imposed by the cold readout. Second, in RF loopback, presenting noise values better than -100 dBc/Hz totally in agreement with the state-of-the-art readout systems. It was demonstrated that the RFSoC Gen3 device is a suitable enabling technology for the next generation of superconducting detector readout systems, reducing system complexity, increasing system integration, and achieving these goals without performance degradation.