Self-Learning Tuning for Post-Silicon Validation

2021/11/17 by Peter Domanski, Dirk Pflüger, Domanski, Peter +5
Computer Science · Engineering · #Advancements in Photolithography Techniques #Artificial Intelligence (cs.AI) #FOS: Computer and information sciences #Integrated Circuits and Semiconductor Failure Analysis #Machine Learning (cs.LG) #VLSI and Analog Circuit Testing

paper · pdf · doi:10.48550/arxiv.2111.08995

openalex publication_date 2021/11/17 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

Increasing complexity of modern chips makes design validation more difficult. Existing approaches are not able anymore to cope with the complexity of tasks such as robust performance tuning in post-silicon validation. Therefore, we propose a novel approach based on learn-to-optimize and reinforcement learning in order to solve complex and mixed-type tuning tasks in a efficient and robust way.

Citations

• Learning to Optimize
• Learning to Optimize: A Primer and A Benchmark

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