2020/11/16 by Paul Scheffler, Florian Zaruba, Scheffler, Paul +7 · 2 citations
Computer Science · #Parallel Computing and Optimization Techniques #Advanced Data Storage Technologies #Cloud Computing and Resource Management
paper · pdf · doi:10.48550/arxiv.2011.08070
Sparse-dense linear algebra is crucial in many domains, but challenging to\nhandle efficiently on CPUs, GPUs, and accelerators alike; multiplications with\nsparse formats like CSR and CSF require indirect memory lookups. In this work,\nwe enhance a memory-streaming RISC-V ISA extension to accelerate sparse-dense\nproducts through streaming indirection. We present efficient dot,\nmatrix-vector, and matrix-matrix product kernels using our hardware, enabling\nsingle-core FPU utilizations of up to 80% and speedups of up to 7.2x over an\noptimized baseline without extensions. A matrix-vector implementation on a\nmulti-core cluster is up to 5.8x faster and 2.7x more energy-efficient with our\nkernels than an optimized baseline. We propose further uses for our indirection\nhardware, such as scatter-gather operations and codebook decoding, and compare\nour work to state-of-the-art CPU, GPU, and accelerator approaches, measuring a\n2.8x higher peak FP64 utilization in CSR matrix-vector multiplication than a\nGTX 1080 Ti GPU running a cuSPARSE kernel.\n