Checking the error correction strength of arbitrary surface code logical gates

2012/10/16 by Thomas J. Milburn, Austin G. Fowler, Milburn, Thomas J. +1
Physics and Astronomy · #FOS: Physical sciences #Quantum Physics (quant-ph) #quant-ph

paper · pdf · doi:10.48550/arxiv.1210.4249

12 pages, 31 figures, comments welcome

arxiv created 2012/10/16 · arxiv updated 2012/10/17

Abstract

Topologically quantum error corrected logical gates are complex. Chains of errors can form in space and time and diagonally in spacetime. It is highly nontrivial to determine whether a given logical gate is free of low weight combinations of errors leading to failure. We report a new tool Nestcheck capable of analyzing an arbitrary topological computation and determining the minimum number of errors required to cause failure.

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