2021/05/31 by Mahmoud Elhebeary, Samer Hanna, Elhebeary, Mahmoud +7
Engineering · #Advancements in PLL and VCO Technologies #Analog and Mixed-Signal Circuit Design #FOS: Electrical engineering #Radio Frequency Integrated Circuit Design #Signal Processing (eess.SP) #electronic engineering #information engineering
paper · pdf · doi:10.48550/arxiv.2106.00140
openalex publication_date 2021/05/31 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
This paper presents an always-on low-power wake-up receiver (WuRx) that activates the remainder of the system when a wake-up signal is detected. The proposed receiver has two phases of waking up. The first phase uses an integrated CMOS Schottky diodes to detect the signal power at a low bias current. The approach dissipates low quiescent power and allows the reuse of the design in multiple frequency bands with only modifying the matching network. In the second phase, a data-locked startable oscillator is proposed to correlate the received data with a target signature. This design eliminates the area and power dissipation of an external crystal oscillator and only turns on when the second phase is activated. By correlating to a target signature, the second phase also reduces the probability of a false alarm (PFA) that would otherwise wake up the high-power bulk of the system. The two-phase approach leads to significant reduction in average power consumption when compared to a single-phase design. This implementation targets sub-ms wake-up latency and operates in the unlicensed band at a 750-MHz carrier frequency with a data rate of 200 kbps. The design achieves ∼8.45pJ/bit and