2019/02/19 by Alexey Milovanov, Milovanov, Alexey
Computer Science · #Complexity and Algorithms in Graphs #Computational Complexity (cs.CC) #FOS: Computer and information sciences #Machine Learning and Algorithms #VLSI and Analog Circuit Testing
paper · pdf · doi:10.48550/arxiv.1902.07201
openalex publication_date 2019/02/19 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
This text is a development of a preprint of Ankit Gupta. We present an approach for devising a deterministic polynomial time blackbox identity testing (PIT) algorithm for depth-4 circuits with bounded top fanin. This approach is similar to Kayal-Shubhangi approach for depth-3 circuits. Kayal and Shubhangi based their algorithm on Sylvester-Gallai-type theorem about linear polynomials. We show how it is possible to generalize this approach to depth-4 circuits. However we failed to implement this plan completely. We succeeded to construct a polynomial time deterministic algorithm for depth-4 circuits with bounded top fanin and its correctness requires a hypothesis. Also we present a polynomial-time (unconditional) algorithm for some subclass of depth-4 circuits with bounded top fanin.