2021/04/07 by José E. Moreira, Moreira, José E., Kit Barton +47 · 2 citations
Computer Science · Engineering · #FOS: Computer and information sciences #Hardware Architecture (cs.AR) #Low-power high-performance VLSI design #Machine Learning (cs.LG) #Numerical Methods and Algorithms #Parallel Computing and Optimization Techniques #Performance (cs.PF) #Programming Languages (cs.PL)
paper · pdf · doi:10.48550/arxiv.2104.03142
openalex publication_date 2021/04/07 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Power ISA(TM) Version 3.1 has introduced a new family of matrix math instructions, collectively known as the Matrix-Multiply Assist (MMA) facility. The instructions in this facility implement numerical linear algebra operations on small matrices and are meant to accelerate computation-intensive kernels, such as matrix multiplication, convolution and discrete Fourier transform. These instructions have led to a power- and area-efficient implementation of a high throughput math engine in the future POWER10 processor. Performance per core is 4 times better, at constant frequency, than the previous generation POWER9 processor. We also advocate the use of compiler built-ins as the preferred way of leveraging these instructions, which we illustrate through case studies covering matrix multiplication and convolution.