2023/07/04 by Daniel Cussen, Jeffrey D. Ullman, Cussen, Daniel +1 · 1 voice
Computer Science · #Parallel Computing and Optimization Techniques #Quantum Computing Algorithms and Architecture #Quantum-Dot Cellular Automata #cs.DS
paper · pdf · doi:10.48550/arxiv.2307.01415
openalex publication_date 2023/07/04 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Matrix multiplication consumes a large fraction of the time taken in many machine-learning algorithms. Thus, accelerator chips that perform matrix multiplication faster than conventional processors or even GPU's are of increasing interest. In this paper, we demonstrate a method of performing matrix multiplication without a scalar multiplier circuit. In many cases of practical interest, only a single addition and a single on-chip copy operation are needed to replace a multiplication. It thus becomes possible to design a matrix-multiplier chip that, because it does not need time, space- and energy-consuming multiplier circuits, can hold many more processors, and thus provide a net speedup.