2015/05/31 by Mostafizur Rahman, Jiajun Shi, Rahman, Mostafizur +8
Computer Science · Engineering · #3D IC and TSV technologies #Additive Manufacturing and 3D Printing Technologies #Advanced Surface Polishing Techniques #FOS: Computer and information sciences #Nanofabrication and Lithography Techniques #Other Computer Science (cs.OH) #cs.OH
paper · pdf · doi:10.48550/arxiv.1506.00286
arxiv created 2015/05/31 · openalex publication_date 2015/05/31 · arxiv updated 2015/06/02 · openalex created_date 2022/10/05 · openalex updated_date 2026/07/28
At sub-20nm technologies CMOS scaling faces severe challenges primarily due to fundamental device scaling limitations, interconnection overhead and complex manufacturing. Migration to 3D has been long sought as a possible pathway to continue scaling, however, intrinsic requirements of CMOS are not compatible for fine-grained 3D integration. We proposed a truly fine-grained 3D integrated circuit fabric called Skybridge that solves nanoscale challenges and achieves orders of magnitude benefits over CMOS. In Skybridge, device, circuit, connectivity, thermal management and manufacturing issues are addressed in an integrated 3D compatible manner. At the core of Skybridge assembly are uniform vertical nanowires, which are functionalized with architected features for fabric integration. All active components are created primarily using sequential material deposition steps on these nanowires. Lithography and doping are performed prior to any functionalization and their precision requirements are significantly reduced. This paper introduces Skybridge manufacturing pathway that is developed based on extensive process, device simulations and experimental metrology, and uses established processes. Experimental demonstrations of key process steps are also shown.