A/D Converter Architectures for Energy-Efficient Vision Processor

2017/03/05 by Du, Li, Li, Yilei
#Emerging Technologies (cs.ET) #FOS: Computer and information sciences

paper · doi:10.48550/arxiv.1703.01681

Abstract

AI applications have emerged in current world. Among AI applications, computer-vision (CV) related applications have attracted high interest. Hardware implementation of CV processors necessitates a high performance but low-power image detector. The key to energy-efficiency work lies in analog-digital converting, where output of imaging detectors is transferred to digital domain and CV algorithms can be performed on data. In this paper, analog-digital converter architectures are compared, and an example ADC design is proposed which achieves both good performance and low power consumption.

Related

• Reconfiguring the Imaging Pipeline for Computer Vision
• 1.5 bit-per-stage 8-bit Pipelined CMOS A/D Converter for Neuromophic Vision Processor
• Energy-Efficient & Real-Time Computer Vision with Intelligent Skipping via Reconfigurable CMOS Image Sensors
• Variable Resolution Pixel Quantization for Low Power Machine Vision Application on Edge
• dAJC: A 2.02mW 50Mbps Direct Analog to MJPEG Converter for Video Sensor Node using Low-Noise Switched Capacitor MAC-Quantizer with Auto-Calibration and Sparsity-Aware ADC