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Mapping high-performance RNNs to in-memory neuromorphic chips

2019/05/25 by Manu V Nair, Giacomo Indiveri, Nair, Manu V +1
Computer Science · Engineering · #Advanced Memory and Neural Computing #Emerging Technologies (cs.ET) #FOS: Computer and information sciences #FOS: Electrical engineering #Ferroelectric and Negative Capacitance Devices #Neural Networks and Reservoir Computing #Neural and Evolutionary Computing (cs.NE) #Signal Processing (eess.SP) #electronic engineering #information engineering

paper · pdf · doi:10.48550/arxiv.1905.10692

openalex publication_date 2019/05/25 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28

Abstract

The increasing need for compact and low-power computing solutions for machine learning applications has triggered significant interest in energy-efficient neuromorphic systems. However, most of these architectures rely on spiking neural networks, which typically perform poorly compared to their non-spiking counterparts in terms of accuracy. In this paper, we propose a new adaptive spiking neuron model that can be abstracted as a low-pass filter. This abstraction enables faster and better training of spiking networks using back-propagation, without simulating spikes. We show that this model dramatically improves the inference performance of a recurrent neural network and validate it with three complex spatio-temporal learning tasks: the temporal addition task, the temporal copying task, and a spoken-phrase recognition task. We estimate at least 500x higher energy-efficiency using our models on compatible neuromorphic chips in comparison to Cortex-M4, a popular embedded microprocessor.

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