2019/12/17 by Alireza Abdoli, Abdoli, Alireza · 2 citations
Computer Science · Engineering · #Biochip #Business #Computer science #Electrowetting and Microfluidic Technologies #Emerging Technologies (cs.ET) #FOS: Computer and information sciences #Flow (mathematics) #Materials science #Mechanics #Microfluidic and Capillary Electrophoresis Applications #Microfluidics #Modular Robots and Swarm Intelligence #Nanotechnology #Physics #cs.ET
paper · pdf · doi:10.48550/arxiv.1912.08353
published in arXiv (Cornell University) (Cornell University) · Master of Science Thesis, Computer Engineering, Shahid Beheshti University, G.C
openalex publication_date 2019/12/17 · arxiv created 2019/12/29 · arxiv updated 2020/01/01 · openalex created_date 2025/10/10 · openalex updated_date 2026/07/28
Given the ever-increasing advances of digital microfluidic biochips and their application in a wide range of areas including bio-chemistry experiments, diagnostics, and monitoring purposes like air and water quality control and etc., development of automated design flow algorithms for digital microfluidic biochips is of great importance. During the course of last decade there have been numerous researches on design, adaptation and optimization of algorithms for automation of digital microfluidic biochips synthesis flow. However, the initial assumption of researchers about absence of faults and deficiencies before and during execution of bio-assays has been proven always not to be the case. Thus, during the past few years researchers have placed great focus on fault-tolerance and fault-recovery of digital microfluidic biochips. In this dissertation we initially introduce proposed architectures for pin-constrained digital microfluidic biochips; the proposed architectures are designed with the aim of improving overall functionality and also at the same time ameliorating fault-tolerance of digital microfluidic biochips in mind. Next, we explain fault-tolerance concepts within the context of pin-constrained digital microfluidic biochips; then we attempt to investigate fault-tolerance of the proposed digital microfluidic architectures versus the base architecture in presence of faults occurrences affecting mixing modules and splitting/storage/detection (SSD) modules.