2025/12/06 by Sheng Lu, Lu, Sheng, Qianhou Qu +7
Computer Science · Engineering · #Error Correcting Code Techniques #Ferroelectric and Negative Capacitance Devices #Numerical Methods and Algorithms
paper · pdf · doi:10.48550/arxiv.2512.22131
Stochastic computing (SC) offers significant reductions in hardware complexity for traditional convolutional neural networks (CNNs). However, despite its advantages, stochastic computing neural networks (SCNNs) often suffer from high resource consumption due to components such as stochastic number generators (SNGs) and accumulative parallel counters (APCs), which limit overall performance. This paper proposes a novel SCNN accelerator based on reconfigurable field-effect transistors (RFETs). The inherent reconfigurability at the device level enables the design of highly efficient and compact SNGs, APCs, and other related essential components. To assess their system-level impact, a representative existing SCNN architecture is adopted as an evaluation framework. Based on accessible open-source standard cell libraries, experimental results demonstrate that the proposed RFET-based SCNN accelerator achieves significant reductions in area, latency, and energy consumption compared to its FinFET-based counterpart at the same technology node.